Yes, there is GSOC project for that that I'm mentoring. It's not an
easy task to be honest as we have to touch the architecture of ublas a
little bit. But it's passionating and fascinating !
Ideally we want to bring SIMD into expression templates.
Practically... let's see :-)
On Wed, May 29, 2013 at 10:34 AM, Mathias Gaunard
On 29/05/13 06:13, Aditya Avinash wrote:
Hi, i have developed vector addition algorithm which exploits the hardware parallelism (SSE implementation).
That's something trivial to do, and unfortunately even that trivial code is broken (it's written for a generic T but clearly does not work for any T beside float). It still has nothing to do with uBLAS.
Bringing SIMD to uBLAS could be fairly difficult. Is this part of the GSoC projects? Who's in charge of this? I'd like to know what the plan is: optimize very specific operations with SIMD or try to provide a framework to use SIMD in expression templates?
The former is better adressed by simply binding BLAS, the latter is certainly not as easy as it sounds.
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